Mentor Graphics has introduced a hardware emulation platform for ARM Cortex-A9 MPCore processor-based system-on-chip (SoC) device designs.
Working with the firm's Veloce2 emulator, the system, called isolve, will test embedded designs containing ARM Cortex-A9 dual core processors.
"It combines the speed and accuracy of ARM-certified IP with the visibility and debug capabilities of the Veloce emulator," said Mentor.
“Our long-standing relationship with ARM enabled us to rapidly create the iSolve solution for ARM Cortex-A9 dual core, delivering a high-speed and accurate hardware-assisted solution that addresses the needs of our customers," said Eric Selosse, vice president and general manager, Mentor Emulation Division.It can be used with traditional in-circuit emulation (ICE) or high-performance transaction-based acceleration.
Mentor is also working with USB test system supplier Teledyne LeCroy on an emulation platform for the verification of system-on-chip (SoC) devices incorporating the SuperSpeed USB serial interface protocol.
Mentor will combine its Veloce2 hardware emulation technology and iSolve applications with Teledyne LeCroy’s Voyager M3i series SuperSpeed USB test system to handle the verification of multiple SuperSpeed USB ports deployed in SoC designs.
Now being designed into consumer, networking, mobile devices and PC peripherals, SuperSpeed USB (3.0) supports dat rates of up to 4.8Gbit/s, ten times faster than USB 2.
This is an example of how emulators are changing the economics of semiconductor and full system design as SoC device and protocol compexity increases.
In particular the move to multicore processor architecture, such as Cortex-A9 MPCore, has forced a change from a reliance on design simulation to hardware and software emulation of semiconductors and systems.
“We are seeing a fundamental change,” Wally Rhines, CEO of Mentor Graphics told Electronics Weekly.
“Emulation will take a bigger and bigger portion of design verification,” said Rhines.
