Altera has teamed up with Flexibilis of Finland to make it easy to implement an FPGA-based Ethernet switch.
Combining Altera FPGAs with the Flexibilis Redundant Switch (FRS) IP provides ‘an easy and cost-effective way to implement highly reliable mission-critical communications systems in smart grid substations by offering no license negotiation, no up-front licensing costs and no per-unit royalty reporting,’ say the two companies.
The Flexibilis IP included in the reference design is a triple-speed 10/100/1000Mbit/s Ethernet Layer 2 switch that is scalable from 3 to 8 ports and is compliant with the IEC 62439-3 standard.
The IP is optimised for use on an Altera low-power, low-cost Cyclone IV FPGA, Cyclone V FPGA or Cyclone V SoC, which feature an integrated dual-core ARMCortex-A9 processor subsystem.
Cyclone V SoCs enable customers to reduce component costs by implementing their switch along with the associated software stacks running on the ARM processor subsystem in the FPGA.
For timing synchronization, the design supports IEEE 1588 Precision Time Protocol (PTP) Version 2.
"The IEC 62439-3 standard is rapidly evolving, making the flexibility of an FPGA an ideal platform to base our FSR IP on," says Heikki Ala-Juusela, chairman of the board at Flexibilis.
Source:
http://www.electronicsweekly.com/Articles/2013/02/25/55632/altera-and-flexibilis-implement-ethernet-switch.htm
