Lattice Semiconductor has revealed the smallest of its iCE40 FPGAs.
Called the LP384, the chip is intended to provide I/O expansion, sensor interfaces, sensor fusion and bus bridging - I2C to I2S, for example.
Static power consumption is typically 19µA from 1.2V, and active power consumption "with all logic engaged" climbs only to 50-75µW at 100MHz, Brent Przybus, director of marketing at the firm, told Electronics Weekly.
Made on a 40nm process, it comes in four packages - from 2.5x2.5mm to 4x4mm BGAs with 25 to 55 I/Os. There is also a 32pin 5x5mm QFN with 21 I/Os.
Slimline design
Inside are 384 logic cells, and nothing else as unlike the majority of iCE40 FPGAs, there is no RAM and no phase-locked loops (PLLs).
State is stored in one of two ways, say Przybus, SRAM during development and OTP before soldering for permanent programming.
An external flash chip can also be used.
Source:
http://www.electronicsweekly.com/Articles/2013/03/13/55747/small-is-beautiful-in-fpgas-says-lattice.htm
