Integrates 64 cores using tree-based network-on-chip (NoC) architecture
Toshiba has developed a low-power, many-core System-on-a-Chip (SoC) for embedded applications used in areas such as digital consumer products and automotive products.
The Japan-based electronics company said the prototype SoC integrates 64 cores, which is eight times more than its multi-core predecessor and is 14 times faster in speed.
The 64-core set up with a cluster size of 84mm2 is achieved by using tree-based network-on-chip (NoC) architecture. The new many-core SoC, integrated with image recognition hardware accelerators, secures 1.5 tera operations per second at 333MHz.
The new SoC features multi-level power gating, clock gating and Toshiba's proprietary low power data-mapping flip-flop circuit, and advances the fabrication process to 40nm.
Toshiba said it is planning to apply the many-core SoC and its related technologies to high performance over-HD (high definition) resolution image processing and recognition.
