IBM is looking for alternatives to CMOS technology and Von Neumann architecture. Semiconductor packaging of integrated bipolar silicon is needed. In addition, 3D integration allows for strong I/O performance; 2.5D and improved materials are also highly beneficial as IBM looks for cost-effective means of semiconductor packaging.
Jon Casey, an IBM fellow in the semiconductor research and development centre, has a background in semiconductor packaging, which is involved in coming up with ways to augment the technology beyond Moore’s Law—the theme of Casey’s presentation this week at the ISS conference. Casey spoke with EE Times before the event and offered an overview of his speech.
Casey told us his views are relatively consistent with those of Bernie Meyerson, as expressed in Meyerson’s recent interview with EE Times. Casey began by saying that Moore’s Law and the traditional CMOS approach is severely challenged:
There’s been lots of press out there that says that Moore’s Law is dead or soon to be dead, and people are putting dates on that. The IT industry itself is undergoing a major paradigm shift to new architectures that are really data-centric due to the vast amount of data on those systems.
As a result, Casey noted the need for a change in approach.
