A leading supplier of thermal management materials, adhesives, pottings and encapsulants to the electronics, LED and solar industries - has announced that George Sears, senior staff scientist, will present a paper at the 2013 International Symposium on Microelectronics (IMAPS).
The event will take place Sept. 29-Oct. 3 at the Rosen Centre Hotel in Orlando, FL. Sears' paper will be presented on Tuesday, Oct. 1 at 10:25 a.m. The presentation is titled "LORD SolderBrace™ Wafer Applied Coating for Improved Reliability and Throughput in WLCSP."
The presentation will address solder fatigue during thermal cycling and solder joint stress. Sears will present a new material from LORD Corporation - SolderBrace™ wafer applied coating - that can be used to partially underfill the WLCSP die at the wafer level. This type of technology can be applied using existing equipment and processing techniques making these materials a more cost effective solution. This new material technology has enabled thermal cycling reliability improvements by replacing the final passivation layer with a new low CTE material as the partial underfill.
This wafer applied partial underfill material technology has been successfully used to provide increased thermal cycling and drop shock reliability in WLCSPs using a number of different methods. The method to be discussed during the presentation is a production process using a screen printed, photo defined polymer system that does not require any in-process post cure.
Sears has been actively involved in materials development for the automotive and industrial electrical and electronic industries for more than 35 years. He has led groups working on the first vacuum encapsulation of high voltage electrical devices for both consumer electronics and the automotive industries. His teams have developed the first high temperature, low modulus urethane encapsulation for automotive controllers, the first ultra-high thermal interface materials for use in computer processors and the first wafer applied epoxy coating for chip packaging.
